Practical technique shows promise for carbon-based electronics

Engineers at Princeton University in New Jersey, US, have developed what they describe as a practical way of replacing silicon in computer chips with the single atom thick sheets of carbon known as graphene.

Graphene outperforms silicon in terms of electronic properties, but the largest single-crystal graphene sheets made to date are no wider than a couple of millimetres. Silicon-based microelectronics, on the other hand, makes use of wafers of the semiconductor material up to 30 cm across.

Stephen Chou and his colleagues Xiaogan Liang and Zengli Fu have demonstrated a method that uses pillars on a stamp – each one tenth of a millimetre wide – to cut and peel off small islands of graphene from bulk graphitic carbon, and then transfer these to the active areas of a microchip substrate.

“Our approach is to completely abandon the classical methods that industry has been using for silicon integrated circuits,” says Chou. “Transfer-printing of graphene opens up an innovative, simple and practical solution to the large graphene wafer problem.”

Manchester University-based graphene expert Andre Geim is impressed with Chou’s work, but notes that the resulting graphene film varies in thickness from zero to 15 layers. Still, he says, we should put this in perspective, and remember that until 2004 the thinnest graphitic films available were more than 30 layers thick.

“The work proves a new conceptual approach to scaling up the production of graphene, and can already be used in certain applications in which homogeneity and one or two layer thickness are not essential, such as, for example, chemical sensors,” says Geim. “Still, it will require much more to persuade the electronic industry that this could be a viable approach.”

Geim adds that this is unlikely to happen until there is confidence that graphene can be grown with the semiconductor layers having the same crystalline orientation as their underlying substrates.

Further reading: “Graphene transistors fabricated via transfer-printing in device active-areas on large wafer”, Liang et al., Nano Lett. 7, 3840 (2007).

Article first published in Nanomaterials News.