Producing semiconductor nanowires is nowadays a relatively simple and inexpensive exercise. But assembling them in a controlled manner into functional electronic circuits remains a major challenge. Many research groups around the world are tackling the problem, and various solutions have been put forward that might find practical application.
Using spin-on glass technology and photolithography, Harvard University applied physicists Mariano Zimmler and Federico Capasso, together with collaborators at the universities of Göttingen, Jena and Bremen in Germany, have demonstrated what they describe as a reproducible, high-volume and low-cost fabrication method for integrating nanowire devices directly onto silicon substrates. Zimmler and Capasso have filed for US patents covering their invention.
Spin-on glass is a dielectric material that is applied to a silicon wafer in liquid form, and films of the material help to flatten uneven surfaces at the smallest scales. Zimmler and Capasso use a particular form of spin-on glass – hydrogen silsequioxane (HSQ) – as the spacer layer between a silicon substrate and the top metallic contact in a nanowire circuit. With its low dielectric constant, HSQ is seen as a potentially useful interlayer dielectric material in high-density circuits. It is said to offer a number of advantages over another spacer material, PMMA, which has been used in previous research in this field.
“The key point of our work is the demonstration that one can make electrical contact to a large number of nanowires simultaneously using mainstream integrated circuit processing techniques such as photolithography, metallisation and spin-on glass deposition,” says Capasso. “It is critical in ensuring commercial penetration of nanowires to be able to use the same tools used in the fabrication of large scale silicon chips. Otherwise the cost of inventing new platforms and therefore building new foundries would become extremely prohibitive.”
By spin-coating HSQ, the researchers create a film which effectively insulates the bottom silicon substrate from any top contact designed to address individual nanowires. As for arranging the nanowires, there are a number of possibilities. “Several methods have been reported in the past,” says Zimmler. “One of the most promising makes use of the Langmuir-Blodgett technique, in which nanowires are spread onto the surface of the aqueous phase in a Langmuir-Blodgett trough and compressed. This causes the nanowires to become aligned along their long axes, and enables accurate control of their average separation.”
The researchers stress, however, that their spin-coating method is independent of the geometrical arrangement of dispersed nanowires. It can therefore be combined with an appropriate nanowire alignment strategy, which may or may not be Langmuir-Blodgett deposition, depending on the circumstances.
To demonstrate their their technique, Zimmler et al. created hundreds of heterojunction diodes formed from zinc oxide nanowires laid on a silicon substrate. These display good rectification properties, and function as ultraviolet LEDs. The plan now is to extend the technique to much larger scales, laying down and arranging conducting nanowires over entire silicon wafers with a method such as Langmuir-Blodgett deposition.
“At the present stage of development, we expect the technique to be extremely useful as a laboratory technique since it can enable the study of nanowire devices in statistically significant quantities,” says Zimmler.
The researchers are now focusing on the combination of their new technique with a nanowire alignment method in order to truly achieve high-density integration. This could, they say, lead to the realisation of large-scale integrated electronic and photonic circuits. Examples of potential applications include large arrays of ultra-small nanoscale lasers for use as optical interconnects and on-chip chemical sensors.
Further reading: “Scalable Fabrication of Nanowire Photonic and Electronic Circuits Using Spin-on Glass”, Zimmler et al., Nano Lett. (2008).
Figure: Nanowire electronic devices based on a sandwich geometry in which a zinc oxide nanowire is placed between a silicon substrate and a top metallic contact, using spin-on glass as an insulating spacer layer to prevent the metal contact from shorting to the substrate (source: Capasso Lab/Harvard School of Engineering and Applied Sciences).
Article first published in Nanomaterials News.